1. Field of the Invention
The present invention relates to a small size semiconductor package, and more particularly, to a semiconductor package of substantially the same size as a semiconductor chip referred to as a chip size package, a semiconductor device using the semiconductor device, and a manufacturing method of the semiconductor device.
2. Description of the Related Art
These days, various apparatus including semiconductor devices, particularly portable apparatus and movable apparatus are being miniaturized and lightened. Semiconductor devices for use in these apparatus are thus desired to be miniaturized and lightened accordingly.
In order to meet the demands, a package of substantially the same size as a semiconductor chip referred to as a chip size package (hereinafter referred to as CSP) has recently been proposed, and some semiconductor devices using such a chip size package are implemented as products.
As a semiconductor device formed with a semiconductor chip mounted on a CSP, for example, as shown in FIG. 8, one in which a semiconductor chip 3 is mounted and fixed via bumps 2 on a semiconductor package 1 is known. In this semiconductor device, the semiconductor package 1 comprises a substrate 4, a conductive connecting pattern 5 formed on one side of the substrate 4, a conductive connecting pattern 6 formed on the other side of the substrate 4, and a wiring material 7 formed so as to pierce the substrate 4 for the purpose of making the connecting pattern 5 electrically connected to the connecting pattern 6. As the material of the substrate 4, ceramics are mainly used for the purpose of making smaller the difference of the coefficient of thermal expansion between the semiconductor chip 3 and the substrate 4 and thus making smaller the thermal stress to be applied to the bumps 2 and the semiconductor element 3.
The semiconductor chip 3 is fixed to the substrate 4 of the semiconductor package 1 thus structured with the conductive connecting pattern 5 formed on the one side of the substrate 4 being electrically connected thereto via the bumps 2 provided on a surface 3a where the element is formed. External connecting terminals 8 such as solder balls for bonding the conductive connecting pattern 6 to a mother board (not shown) are fixed to the conductive connecting pattern 6 formed on the other side of the substrate 4. By this, the bumps 2 of the semiconductor chip 3 are electrically connected to the external connecting terminals 8 via the connecting pattern 5, the wiring material 7, and the connecting pattern 6.
The semiconductor element chip 3 thus mounted on the semiconductor package 1 is integrally fixed to the semiconductor package 1 by sealing the whole periphery of the junction between the substrate and the semiconductor chip 3 with resin 9 referred to as underfile. It is to be noted that the resin 9 referred to as underfile also performs a function to disperse the above-mentioned thermal stress due to the difference of the coefficient of thermal expansion between the substrate 4 and the semiconductor chip 3.
FIG. 9 illustrates another example of a semiconductor device formed with a semiconductor element mounted on a CSP. In FIG. 9, a semiconductor device 10 is generally referred to as a chip on board (COP). The semiconductor device 10 is formed by mounting and fixing a semiconductor chip 13 via adhesive 12 or the like on a semiconductor package 11.
The semiconductor package 11 comprises a substrate 14 the material of which is glass epoxy resin or the like, a conductive connecting pattern 15 formed on one side of the substrate 14, a conductive connecting pattern 16 formed on the other side of the substrate 14, and a wiring material 17 formed so as to pierce the substrate 14 for the purpose of making the connecting pattern 15 electrically connected to the connecting pattern 16.
A surface opposite to a surface 13a where the element is formed of the semiconductor chip 13 is fixed with the adhesive 12 to one side of the substrate 14 of the semiconductor package 11 thus structured. Further, an electrode (not shown) formed on the surface 13a where the element is formed of the semiconductor chip 13 is electrically connected to the connecting pattern 15 of the semiconductor package 11 via wires 18. External connecting terminals 19 such as solder balls for bonding the conductive connecting pattern 16 to a mother board (not shown) are fixed to the conductive connecting pattern 16 formed on the other side of the substrate 14. By this, the electrodes of the semiconductor chip 13 are electrically connected to the external connecting terminals 19 via the connecting pattern 15, the wiring material 17, and the connecting pattern 16. The semiconductor package 11 with the semiconductor chip 13 thus mounted thereon is further provided with resin 20 covering the one side of the substrate 14 and the semiconductor chip 13 for the purpose of protecting the surface 13a where the element is formed and the wires 18. By this, the semiconductor chip 13 and the wires 18 are sealed with the resin 20.
However, with the semiconductor device shown in FIG. 8, in order to decrease the thermal stress between the substrate 4 and the semiconductor chip 3, ceramics, which are expensive, have to be used as the material of the substrate 4, leading to high cost as a whole, which is a problem to be solved.
Further, with the semiconductor device 10 shown in FIG. 9, although, since the thermal stress between the substrate 14 and the semiconductor chip 13 can be absorbed by the wires 18, glass epoxy resin, which is inexpensive, can be used as the material of the substrate 14, since the wires 18 are disposed so as to go around to the outer peripheral side of the semiconductor chip 13 in this structure, the size of the semiconductor device 10 as a whole with respect to the semiconductor chip 13 is large, and thus, the semiconductor device 10 can not sufficiently meet the demands for miniaturizing and thinning the semiconductor device.